Astera Labs launches Leo smart memory controllers, cutting first-token latency by up to 62%

Astera Labs, a high-speed chip interconnect startup based in California, US, announced an expansion of its Leo smart memory controller lineup with three new series: Leo X, Leo 2 E, and Leo 2 P.

Leo 2 E and Leo 2 P comply with the CXL 3.2 standard and support four downstream DDR4/DDR5 memory controllers. Leo 2 E supports PCIe Gen6 1×16 single-port configuration, while Leo 2 P adds 2×8 dual-port support for pooling and sharing additional memory.

The Leo X series is a network-based smart memory controller designed specifically for AI accelerator-side memory needs. It works with Astera Labs' Scorpio network switching chips to enable GPU scale-out via PCIe and platform-specific protocols, providing a dedicated memory tier to offload KV Cache and agent context.

Astera Labs says Leo X offers lower latency and higher bandwidth for GPU access to KV Cache, cutting first-token latency by up to 62% and boosting token throughput by up to 22%.